74LVTH125SJX  

参数	数值
规格书	数据手册下载
Polarity	Non-Inverting
Tolerant I/Os	5 V
Package	14SOP-II
Maximum Propagation Delay Time @ Maximum CL	4.9@2.7V|3.9@3.3V ns
Logic Function	Buffer/Line Driver
Logic Family	LVT
Input Signal Type	Single-Ended
Output Type	3-State
Bus Hold	Yes
Number of Outputs per Chip	4