MT9VDDT6472AG-40BC1  

参数	数值
规格书	数据手册下载
Total Density	512 MB
Data Bus Width	72 Bit
Package	184UDIMM
Operating Temperature	0 to 70 °C
Number of Chip per Module	9
Sub-Category	DDR SDRAM
Typical Operating Supply Voltage	2.6 V
Chip Density	512 Mb
Main Category	DRAM Module
Maximum Clock Rate	400 MHz
Organization	64Mx72