SN74LVC2G34DRLR  

参数	数值
规格书	数据手册下载
Polarity	Non-Inverting
Tolerant I/Os	5 V
Package	6SOT
Maximum Propagation Delay Time @ Maximum CL	4.1@3.3V|3.2@5V ns
Logic Function	Buffer
Logic Family	LVC
Input Signal Type	Single-Ended
Number of Outputs per Chip	2