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SN74AUP3G06DQER

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参数	数值
规格书	数据手册下载
Polarity	Inverting
Tolerant I/Os	3.6 V
Package	8X2SON
Maximum Propagation Delay Time @ Maximum CL	16@1.2V\|12.3@1.5V\|10.7@1.8V\|10.5@3.3V\|7.1@2.5V ns
Logic Function	Buffer/Driver
Logic Family	AUP
Input Signal Type	Single-Ended
Output Type	Open Drain
Number of Outputs per Chip	3

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