74LVCH16240ADGGRE4  

参数	数值
规格书	数据手册下载
Polarity	Inverting
Tolerant I/Os	5 V
Package	48TSSOP
Maximum Propagation Delay Time @ Maximum CL	5@2.7V|4.2@3.3V ns
Logic Function	Buffer/Line Driver
Logic Family	LVC
Input Signal Type	Single-Ended
Output Type	3-State
Bus Hold	Yes
Number of Outputs per Chip	16