SN74AUC2G240YZPR  

参数	数值
规格书	数据手册下载
Polarity	Inverting
Tolerant I/Os	3.6 V
Package	8DSBGA
Maximum Propagation Delay Time @ Maximum CL	2.5@1.8V|1.7@2.5V ns
Logic Function	Buffer/Line Driver
Logic Family	AUC
Input Signal Type	Single-Ended
Output Type	3-State
Number of Outputs per Chip	2